搜索资源列表
CORDIC_mixer
- FPGA可实现的，使用cordic算法的NCO模块混频模块。该模块基于cordic原理，算法中只需要加法和移位运算既可以完成信号的混频功能-FPGA can be achieved, the use of the NCO cordic algorithm module mixing module. Cordic module based on the principle, the algorithm only needs Adder and shift operator can complete
FPGA-CPLD_DesignTool(5-6)
- FPGA-CPLD_DesignTool(example5-6),需要的朋友可以下载-FPGA-CPLD_DesignTool (example5-6), a friend in need can be downloaded
FPGA-CPLD_DesignTool(7)
- FPGA-CPLD_DesignTool(example7),需要的朋友可以下载-FPGA-CPLD_DesignTool (example7) a friend in need can be downloaded
MIT_MIPS_Core.tar
- 麻省理工的一个实验室实现的MIPS IP CORE，可以在FPGA上跑通 -a Massachusetts Institute of Technology laboratory achieved MIPS IP CORE, the FPGA can run on Link
Song_FPGA
- 这是一个FPGA的实验源码，可以实现对一段音乐的播放。用Verilog语言编写的，对初学者会有一定的帮助。-This is a source of FPGA can be achieved on a music player. Verilog language used, for beginners will be of some help.
FPGA-based-DAC
- 用fpga实现的DA转换器，有说明和源码，VDHL文件。 A PLD Based Delta-Sigma DAC Delta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinary performance and low cost of today s audio CD players. The simplest Delta-Sigma DAC cons
CAN--for-FPGA
- FPGA控制SJA1000实现CAN协议 适合深入学子FPGA的学生 很不错-FPGA control the SJA1000 CAN protocol for in-depth realization of the students are very good students FPGA
用verilog写的对ad0809的控制
- 用verilog写的对ad0809的控制，完整工程，希望对大家能有帮助,Written using Verilog for ad0809 control, complete works, in the hope that we can help
iic 用verilog语言写的FPGA iic驱动程序
- 用verilog语言写的FPGA iic驱动程序，实现对存储器的读写，有需要的可以下载看看哦！-Language used to write verilog FPGA iic driver to achieve the memory read and write, there is a need can be downloaded to see Oh!
CAN--for-FPGA FPGA控制SJA1000实现CAN协议
- FPGA控制SJA1000实现CAN协议 适合深入学子FPGA的学生 很不错-FPGA control the SJA1000 CAN protocol for in-depth realization of the students are very good students FPGA
ds18b20.ds18b20的Verilog程序
- ds18b20的Verilog程序，经测试验证可以使用。注意此版本为DALLS DS18B20而不是DS1820,注意加5K上拉电阻。,ds18b20 the Verilog process can be used to verify by testing. Note that this version rather than DALLS DS18B20 for DS1820, the attention of Canadian 5K pull-up resistor.
ICETEK-VC5509-C.rar
- ICETEK_VC5509_C的硬件原理图，泰瑞公司开发的针对TI C5509A DSP的评估版。包含xilinx FPGA 及语音解码芯片TLV320AIC23等的连接，可借鉴性强 ,ICETEK_VC5509_C hardware schematics, Terry developed for the TI C5509A DSP evaluation version. Contains xilinx FPGA and voice decoder chip TLV320AIC23 conne
EP3C25EVM.rar
- cyclone III EP3C25 开发板原理图,包括flash, sdram, usb, ethernet 等接口电路，可作设计参考。,cyclone III EP3C25 development board schematic diagram, including flash, sdram, usb, ethernet interface circuit, etc., can be used for design.
sd_reader.rar
- SD卡读卡器模块的VHDL及软件驱动代码，可作为外设挂接在Avalon总线上。支持以SD模式、4线模式读取。在24MHz时钟驱动下读取速率可达8MByte/s,SD card reader module and software drivers VHDL code, can be articulated as a peripheral bus in Avalon. To support the SD model, 4-wire mode read. Driven by the 24MHz clo
FPGA-LCD12864v.rar
- FPGA驱动LCD12864显示，可显示图形和文字，显示内容可根据实际情况而定,FPGA-driven LCD12864 show that can display graphics and text, display content can be determined according to the actual situation
gtp.rar
- 一个可以使用的RocketI/O开发实例。基于Xilinx FPGA Virtex5平台。,One can use RocketI/O development example. Based on Xilinx FPGA Virtex5 platform.
trunk-hdlc.rar
- 高级链路层协议的实现，vhdl，fpga,- 8 bit parallel backend interface - use external RX and TX clocks - Start and end of frame pattern generation - Start and end of frame pattern checking - Idle pattern generation and detection (all ones) - Idle pattern
FPGA实现多功能闹钟
- FPGA实现多功能闹钟，有电子钟、秒表、定时器、电子琴功能-FPGA realization of multi-function alarm clock, which can function as a clock, a stopwatch, a timer,and a piano.
FPGA
- 基于FPGA设计的多功能信号发生器，可以生成各种常用的波形-FPGA-based design of multi-function signal generator, can generate waveforms of various commonly used
FPGA-usb-control
- USB 68013 通用固件 和配套上位机程序以及下位机FPGA程序verilog 可实现USB高速通信-USB 68013 generic PC firmware and supporting procedures and lower computer USB FPGA program can achieve high-speed communications